This invention relates, in general, to semiconductor devices, and more particularly to a method of fabricating a semiconductor device which has vertical transistors and a self-aligned buried oxide region.
The advantages of an oxide isolated bipolar integrated circuit structure are well recognized, and include, in particular, increased circuit operating speed and increased packing density. In such a structure, isolation between adjacent devices is provided by an insulating oxide which extends through the epitaxial layer to the underlying substrate. Devices are thus isolated on the edge by the oxide and on the bottom by the PN junction between the epitaxial layer and the substrate. To fully realize the optimum in packing density, device contact areas must be self-aligned since otherwise valuable space must be expended to provide for possible misalignment tolerances.
However, the above structure is limited in the speed of the device due to parasitics such as base-collector capacitance and base resistance. A need therefore existed for a device structure and a method for its fabrication which would reduce such speed-limiting parasitic time constants while maintaining optimum packing density and isolation.